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A memory type range register (MTRR) controls the caching of CPU access to memory. These types of control registers direct the general behavior of the central processing unit.
Memory type range registers can accommodate different types of access to a range of memory such as uncached, write-through, write-combining and write-back. These methods determine how write tasks get to the cache. MTRRs can designate different parts of an address space for different uses. Newer methods use page attribute tables instead of registers (or along with registers) to handle these types of constraints. Pros may look at loads from cacheable or uncacheable memory to determine how accesses are treated by a system that uses memory type range registers.