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Clock gating is a technique that enables the saving of electrical power used by computer processors. It ensures power saving by turning on a functional logic block clock, but only when required.
Clock gating was the mainstay of the Pentium 4 architecture’s power saving modes.
Clock gating works by efficiently utilizing the clock signals on sequential or synchronous circuits, mostly found in computer processors. Typically, clock gating is implemented in the form of integrated clock gating cells. It manages the clock tree in a way that uses less portions of the circuitry, resulting in reduced flip-flop switching. This leads to power saving that is previously incurred by switching flip flop states. It also leads to less die area, as its replaces muxes with clock gating logic.