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A Single Chip Cloud Computer (SCC) is an experimental microprocessor developed by Intel Labs. The SCC microprocessor includes 48 cores integrated on a single silicon chip. SCC has a dual core SCC tile, memory controller and 24-router mesh network.
SCC resembles a cluster of computer nodes capable of communicating with other computer node clusters. Because it serves as a computer data center on a silicon chip, the SCC is considered an excellent example of a cloud data center and ideal hardware platform.
SCC is part of Intel’s Tera-Scale computing research project. The SCC program was led by researchers from Intel Labs in Bangalore, India; Braunschweig, Germany and the U.S.
The SCC microprocessor consists of 24 tiles with two cores per tile. Each core, which may be used as a separate computing node running separate OS and software stacks, has only two cache levels, further simplifying design and minimizing power consumption. Applications running on SCC can switch cores on and off, depending on requirements. SCC's two most important features - message-passing and power management - have been successfully tested.
SCC is ultimately intended to facilitate multi-core processor scaling to more than 100 cores and provide features, such as message-passing, advanced power management and on-chip networks. The SCC architecture mirrors several cloud computers merged as a single silicon chip. All 48 cores may operate simultaneously over a range of 25-125 W. Network routing frequency and voltage may be selectively configured.
SCC features include:
Intel Labs anticipates that the majority of industry and educational research partners will eventually participate in advanced research programs on the SCC hardware platform.
A variety of applications may be run on the single chip, including Web servers, data informatics, bioinformatics and financial informatics. Because of its rich memory architecture, SCC facilitates parallel software programming, enables cluster application movement and provides an option to explore algorithm flexibility due to reduced latency.