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A CPU interrupt code (CPU) is a code sent by software or hardware to a CPU to suspend the execution of all processes until the process requested in the interrupt is complete.
Interrupts allow software or hardware to take precedence over existing program execution, usually in order to perform critical actions such as protocol acknowledgment or a timing signal. They can be edge-triggered or level-triggered.
The interrupt codes in newer computer systems are retained in the same class in an interrupt stack or interrupt queue. The interrupt signals alert the processor to the existence of one or more interrupts of a particular class. Interrupt codes are sampled by the processor with the help of stack and queue arrangements. Every time an interrupt is made, the new instructions accompanying that interrupt are added to the top of the program execution stack. When the stack or queue becomes empty, the interrupt signal drops. As the new interrupt codes get generated, they simply get added to the stack or queue automatically.
In older computer systems, the interrupt signals of Class I, II and III identifying code are received and processed by the processor at the same time. The interrupts of the same class tend to get locked up by the interrupt processor.
CPUs follow a specific sequence of events while processing an interrupt in which interrupt processing is prioritized over normal program execution. The first-level interrupt handling code is written very carefully. After the interrupt has been handled, the CPU’s execution state is restored and the interrupt is dismissed. The CPU then continues the suspended program execution.
Interrupt processing must be handled as efficiently as possible. It is recommended that the operating system be kept free of interrupts as these can substantially slow down the overall system's operating speed.